I also hope whoever gave risc-v seperate floating-point registers stubs their toe on a rusty nail
This only made sense in the 80s where the FPU was a seperate piece of silicon.
Nowadays there's no reason to have a seperate FPU even in a space-constrained microcontroller
@iska
It makes no sense to make floating point capabilities mandatory, microcontrollers aren't SBCs — some of them are very basic.
Floating point capabilities are still optional even in the latest Cortex-M cores: https://en.wikipedia.org/wiki/ARM_Cortex-M#Cortex-M52
@m0xee@social.librem.one @iska@catposter.club
It makes no sense to make floating point capabilities mandatory
I didn't say that. I'm talking about F/D extensions creating seperate register spaces, making programming burdensome and dies largerThat's kinda contradictory. What is your point?
I'm talking about different extensions. Making x1-x31 operate on floats is free, making v0 a mask register on low bits isn't.This has also been done in Azul Vega manycore CPUs.
@iska
I see! No idea why it's this way, I think the reasoning behind it might be less obvious and has to do with internal schematics, could be that using the same register for integer and IEEE 754 encoded values makes the load-store paths significantly more complex 🤷
@m0xee@social.librem.one @iska@catposter.club not by much, and probably made up by not creating 32+ extra registers.
It's more of a historical artifact than anything
@iska
Also, as far as I can tell, the author of the linked article complains about the dual use of registers and you complain… about presence of dedicated registers? 🤷
That's kinda contradictory. What is your point?